• Profile
  • Director of Technology, Intel Corp
  • Stanford University
  • San Francisco Bay
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  • Professional Experience

    2009 - Present
    Teaching Analog IC Design courses
    2004 - Present
    Consumer Goods | Santa Clara, United States | 10001+
    Working on silicon integration of SoC designs on the latest Intel process nodes.
    2004 - Present
    Military | Washington, United States | 10001+
    Officer in charge of 15 security personnel.
    2000 - Present
    Telecommunications | Berkeley, United States | 10001+
    Instructor of analog design, RFIC design, BiCMOS design, RF fabrication and testing.
    1995 - Present
    RFIC design and consulting company. Designed several analog and RFCMOS chips, invited to lecture at Tsinghua University in Beijing and at Sweden's Royal Institute of Technology.
    1992 - 2008
    2004 - 2007
    2002 - 2004
    Started US-based Japanese-funded company designing new generation of semiconductor memories and related circuits. Also designed new type of RF magnetron to deposit nanocrystalline materials.
    2000 - 2002
    Founder of multi-com chip company. Developed single-chip solution with 802.11ABG, BT and GPRS. Company was acquired in 2004 by large semiconductor manufacturer.
    1999 - 2001
    Research | 1001-5000
    2000 - 2001
    1997 - 1999
    Developed circuits and processes for CMOS imaging. Worked with TSMC to develop first CMOS imaging process in 1998. Company was acquired by Agilent.
    1990 - 1997
    Semiconductors | 1001-5000
    Worked on reconfigurable logic, as well as new memories and mixed-signal circuits. Worked on long-term on-site projects with Texas Instruments, Cypress Semiconductors, Sharp Microelectronics and TSMC.
    1988 - 1989
    Research | 1001-5000 employees
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